2023 question paper

DIGITAL ELECTRONICS

17 questions

1. Q1a. Convert the decimal number 108.25 to its binary equivalent.20232m

   Module 1: Fundamentals and Logic Families

   Convert the decimal number 108.25 to its binary equivalent.

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   Worked Solution

   Answer

   Decimal $108.25_{10} = \mathbf{1101100.01_2}$

   Explanation

   We convert integer and fractional parts separately.

   1. Integer part: $108_{10}$ → binary

   Use repeated division by 2:

   Division	Quotient	Remainder
   108 ÷ 2	54	0
   54 ÷ 2	27	0
   27 ÷ 2	13	1
   13 ÷ 2	6	1
   6 ÷ 2	3	0
   3 ÷ 2	1	1
   1 ÷ 2	0	1

   Reading remainders bottom → top:
   $$108_{10} = 1101100_2$$
   Verification: $1\cdot64 +1\cdot32 +0\cdot16 +1\cdot8 +1\cdot4 +0\cdot2 +0\cdot1 = 108$.

   2. Fractional part: $0.25_{10}$ → binary

   Repeated multiplication by 2:

   • $0.25 \times 2 = 0.50$ → 0
   • $0.50 \times 2 = 1.00$ → 1 → terminate (fraction = 0)

   Reading integers top → bottom:
   $$0.25_{10} = 0.01_2$$

   3. Combine

   $$108.25_{10} = 1101100.01_2$$

   Check

   $1101100.01_2 = 64+32+8+4 + 0/2 +1/4 =108 +0.25 =108.25$ ✓

   Final Answer

   $$\mathbf{108.25_{10} = 1101100.01_2}$$

2. Q1b. Draw the truth table of JK flip-flop.20232m

   Module 3: Sequential Circuits

   Draw the truth table of JK flip-flop.

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3. Q1c. Draw the truth table and logic circuit of a half-adder.20232m

   Module 2: Combinational Circuits

   Draw the truth table and logic circuit of a half-adder.

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4. Q1d. Write the difference between combinational and sequential circuits.20232m

   Module 2: Combinational Circuits

   Write the difference between combinational and sequential circuits.

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5. Q1e. Draw the timing diagram of SR flip-flop.20232m

   Module 3: Sequential Circuits

   Draw the timing diagram of SR flip-flop.

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6. Q1f. Find 2's complement of 1011011.20232m

   Module 1: Fundamentals and Logic Families

   Find 2's complement of 1011011.

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7. Q1g. Number of 2:1 multiplexers required to design a 256:1 multiplexer.20232m

   Module 2: Combinational Circuits

   Number of 2:1 multiplexers required to design a 256:1 multiplexer.

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8. Q1h. Add hexadecimal numbers 2ABC and 78F2.20232m

   Module 1: Fundamentals and Logic Families

   Add hexadecimal numbers 2ABC and 78F2.

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9. Q1j. What is the use of a K-map?20232m

   Module 1: Fundamentals and Logic Families

   What is the use of a K-map?

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10. Q2a. Implement the function: F(A, B, C) = \Sigma m(0,1,2,3,7)20237m

    Module 2: Combinational Circuits

    Implement the function: $$F(A, B, C) = \Sigma m(0,1,2,3,7)$$

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12. Q2b. Realize XNOR logic function using NAND gates only.20237m

    Module 1: Fundamentals and Logic Families

    Realize XNOR logic function using NAND gates only.

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13. Q3. Simplify: Y = ABC + AB'C + A'BC202314m

    Module 2: Combinational Circuits

    Simplify: $$Y = ABC + AB'C + A'BC$$

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14. Q4. Design a logic circuit with inputs A, B, C, D and output Y, where Y = 1 when A and B are both high, and C and D are either both low or both high.202314m

    Module 2: Combinational Circuits

    Design a logic circuit with inputs A, B, C, D and output Y, where Y = 1 when A and B are both high, and C and D are either both low or both high.

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15. Q5. Explain clocked SR flip-flop with the help of a master–slave flip-flop.202314m

    Module 3: Sequential Circuits

    Explain clocked SR flip-flop with the help of a master–slave flip-flop.

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16. Q7. Summarize the design procedure for a synchronous sequential circuit.202314m

    Module 3: Sequential Circuits

    Summarize the design procedure for a synchronous sequential circuit.

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17. Q8a. Explain the working of a ladder DAC with diagram.20237m

    Module 4: A/D and D/A Converters

    Explain the working of a ladder DAC with diagram.

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18. Q8b. Design a 3-bit binary counter using T flip-flops.20237m

    Module 3: Sequential Circuits

    Design a 3-bit binary counter using T flip-flops.

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