2024 question paper
DIGITAL ELECTRONICS
24 questions
Q1a. What is the use of K-map?20242m
Module 1: Fundamentals and Logic Families
View this question on its own page →What is the use of K-map?
Q1b. Discuss Universal gates.20242m
Module 1: Fundamentals and Logic Families
View this question on its own page →Discuss Universal gates.
Q1c. Add hexadecimal number 2ABC and 98F2.20242m
Module 1: Fundamentals and Logic Families
View this question on its own page →Add hexadecimal number and .
Q1d. Number of 2:1 multiplexers required to design a 256:1 mux is ____.20242m
Module 2: Combinational Circuits
View this question on its own page →Number of 2:1 multiplexers required to design a 256:1 mux is ____.
Q1e. Find 2's complement of 1011011.20242m
Module 1: Fundamentals and Logic Families
View this question on its own page →Find 2's complement of .
Q1f. What is the function of a sample-and-hold circuit?20242m
Module 4: A/D and D/A Converters
View this question on its own page →What is the function of a sample-and-hold circuit?
Q1g. Define the term propagation delay.20242m
Module 1: Fundamentals and Logic Families
View this question on its own page →Define the term propagation delay.
Q1h. Define race-around condition in JK flip-flop.20242m
Module 3: Sequential Circuits
View this question on its own page →Define race-around condition in JK flip-flop.
Q1i. What is the purpose of expanding memory size?20242m
Module 5: Memory and PLDs
View this question on its own page →What is the purpose of expanding memory size?
Q1j. Differentiate between ROM and RAM.20242m
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Q2a. Realize XNOR logic function using NAND gate only.20247m
Module 1: Fundamentals and Logic Families
View this question on its own page →Realize XNOR logic function using NAND gate only.
Q2b. Simplify Y = ABC + A'BC + AB'C.20247m
Q3. A logic circuit has four inputs A, B, C, D and output Y. Y = 1 when A and B are both 1, subjected to the condition that C and D are both low or both high. Design the logic circuit.202414m
Module 2: Combinational Circuits
View this question on its own page →A logic circuit has four inputs and output . when and are both 1, subjected to the condition that and are both low or both high. Design the logic circuit.
Q4a. Design an 8-to-3 line Encoder circuit.20247m
Module 2: Combinational Circuits
View this question on its own page →Design an 8-to-3 line Encoder circuit.
Q4b. Implement NAND gate using TTL logic family.20247m
Module 1: Fundamentals and Logic Families
View this question on its own page →Implement NAND gate using TTL logic family.
Q5a. Design a parallel-to-serial converter using shift registers and explain its operation.20247m
Module 3: Sequential Circuits
View this question on its own page →Design a parallel-to-serial converter using shift registers and explain its operation.
Q5b. Compare the characteristics and applications of JK and T flip-flops.20247m
Module 3: Sequential Circuits
View this question on its own page →Compare the characteristics and applications of JK and T flip-flops.
Q6a. Explain the working principle of an R-2R ladder DAC with a detailed diagram.20246m
Module 4: A/D and D/A Converters
View this question on its own page →Explain the working principle of an R-2R ladder DAC with a detailed diagram.
Q6b. Design a 3-bit flash ADC and explain its working with an example.20247m
Module 4: A/D and D/A Converters
View this question on its own page →Design a 3-bit flash ADC and explain its working with an example.
Q7a. Find the simplified logical expression for: Y(A,B,C,D,E) = \Sigma m(0,2,4,7,8,10,12,16,18,20,23,24,25,26,27,28)20247m
Module 2: Combinational Circuits
View this question on its own page →Find the simplified logical expression for:
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Q8a. Implement S-R, T, and D flip-flops using a JK flip-flop. Also show the implementation using state tables.20247m
Module 3: Sequential Circuits
View this question on its own page →Implement S-R, T, and D flip-flops using a JK flip-flop. Also show the implementation using state tables.
Q8b. Discuss the organization and operation of content-addressable memory (CAM).20247m
Module 5: Memory and PLDs
View this question on its own page →Discuss the organization and operation of content-addressable memory (CAM).
Q9a. Write a short note on Binary Parallel Adder.20247m
Module 2: Combinational Circuits
View this question on its own page →Write a short note on Binary Parallel Adder.
Q9b. Write a short note on Digital IC logic families.20247m
Module 1: Fundamentals and Logic Families
View this question on its own page →Write a short note on Digital IC logic families.
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