Why WMFC is needed:

Main memory (DRAM) is asynchronous and slower than CPU. Its access time is variable and longer than one CPU clock period. CPU issues read/write by placing address/data on bus and issues Memory Enable but cannot proceed until memory completes the operation.

WMFC (Wait-for-Memory-Function-Completed) is a control step where CPU waits for MFC (Memory Function Completed) signal from memory controller.

• Ensures data in MDR/MBR is valid before it is used (read) or guarantees write has been latched.
• Synchronizes fast synchronous CPU with slow asynchronous memory.
• Without WMFC, CPU would fetch stale/wrong data or overwrite next operation, causing incorrect execution. Cycle time = access time + recovery time, so next memory operation can start only after WMFC/MFC.

In synchronous control sequence: MAR ← address; MDR ← data (for write); WMFC; MDR ← valid data (for read).