Addressing Modes - Detailed Explanation [14 Marks]

Addressing mode defines how the effective address (EA) of an operand is generated from the instruction. It determines where the operand is - in instruction itself, register, or memory. Efficient modes reduce instruction size and execution time.

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1. Implied / Implicit Mode

Operand is implied by opcode itself. No address field.
Example: CLC (clear carry), HLT, STC. EA not needed.

2. Immediate Mode

Operand is literal value within instruction.
EA = - , Operand = instruction field

MOV AL, #20H    ; AL <- 20H
ADD R1, #10     ; R1 <- R1 + 10

Advantage: Fast (no memory fetch for operand). Use: constants.

3. Register Mode

Operand in CPU register. Field specifies register number.

MOV R1, R2      ; R1 <- R2
ADD AX, BX

Very fast - no memory access. Register Indirect variant: register holds memory address.

MOV AL, [BX]    ; AL <- M[BX]   (BX points to memory)
LDA (R1)        ; AC <- M[R1]

4. Direct / Absolute Mode

Instruction contains full memory address of operand.
EA = Address field , Operand = M[EA]

LDA 2500H       ; AC <- M[2500H]
STA 3000H

Simple but needs large address field → long instruction, limited addressability.

5. Indirect Mode

Address field contains address of address. Need two memory accesses.
EA = M[Address field]

LDA @2000H      ; If M[2000H]=3000H, then AC <- M[3000H]
MOV R1, @(R2)   ; variant: register indirect with indirection bit

Useful for pointers, but slower.

6. Indexed Mode

EA = Base (in address field) + Index Register

LDX 1000H(X2)   ; EA = 1000H + X2 , AC <- M[EA]

Variants: Auto-index (increment/decrement after access) for arrays/loops.
Use: Array access A[i] → base address of A + i.

7. Based / Base-Register Mode

EA = Base Register + Displacement

MOV AL, [BX+500H]  ; EA = BX + 500H (8086 based mode)

Similar to indexed but base is pointer (e.g., base of array/structure), displacement is offset.

8. Relative / PC-Relative Mode

EA = PC + Displacement (offset relative to current instruction)

BEQ  20H       ; branch to PC+20H if equal
JMP  LABEL     ; LABEL is displacement from PC

Advantage: Position-independent code, short displacement field.

9. Stack Mode

Operand on top of stack (SP points to TOS). Implicit.

PUSH AX       ; SP--, M[SP] <- AX
POP BX        ; BX <- M[SP], SP++

10. Autoincrement / Autodecrement (Register Indirect with update)

MOV (R1)+, R2   ; R1 points to operand, then R1++
MOV -(R1), R2   ; R1--, then access

Efficient for traversing arrays/strings.

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Comparison Table:

Mode	EA Generation	Memory Accesses	Example
Immediate	No EA	0	ADD #5
Direct	EA = A	1	LOAD 100
Indirect	EA = M[A]	2	LOAD @100
Register	EA = R	0	ADD R1,R2
Reg Indirect	EA = (R)	1	LOAD (R1)
Indexed	EA = A + (XR)	1	LOAD 100(X1)
Relative	EA = PC + Offset	1	BNE -10

Significance in Instruction Design: Choice affects instruction length, number of memory references, capability for relocatable code, handling of arrays/pointers, and pipeline efficiency. Modern RISC (e.g., ARM, MIPS) favors register, immediate, base+offset, and PC-relative; CISC (x86) supports rich set of modes.

8086 Example: MOV AX, [BX+SI+1000H] uses based-indexed with displacement: EA = (BX)+(SI)+1000H.

Effective addressing is hardware implemented via 2's complement adder in address generation unit before memory access.