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Module 2: x86 Architecture, CPU Control, I/O, Memory System Design

201714m

What is meant by Addressing Mode? Explain at least five different addressing modes with an example.

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Addressing Mode

Definition: The method by which the CPU interprets the address field of an instruction to obtain the effective address (EAEA) of the operand or the data itself. It determines where operand is and how to compute EAEA. Choice affects instruction length, cycles, and programming ease.

General flow: EA=f(address field,registers,PC)EA = f(\text{address field}, \text{registers}, PC ), operand =M[EA]= M[EA] or R[EA]R[EA].

5+ Addressing Modes with Examples (8085/8086/Mano style)

1. Implied / Implicit Mode
Operand is implicit in opcode, no address field.
EA = implied register
Example: CLA (Clear AC), CLC (clear carry), HLT. STC on 8086 implies CF←1CF\leftarrow1.

2. Immediate Mode
Operand itself is in address field / next byte. No memory fetch beyond instruction.
Operand=fieldOperand = \text{field}
Example: MVI A, 05H -> A←05HA\leftarrow05H; ADD #10 -> AC←AC+10AC\leftarrow AC+10; LDA #100 loads value 100, not M[100]M[100]. Useful for constants. Fast.

3. Direct / Absolute Mode
Address field = EAEA. EA=AEA = A, operand =M[A]= M[A].
Example: LDA 1000H -> AC←M[1000H]AC\leftarrow M[1000H]; STA 2050H stores AC at 2050H.
[8086: MOV AX, [5000H]]. Simple but instruction must hold full address.

4. Indirect Mode
Address field = address of address. EA=M[A]EA = M[A].
Example (Mano): LDA I 200 where M[200]=300M[200]=300 -> AC←M[300]AC\leftarrow M[300].
Often denoted LDA @200 or MOV AX, [BX] indirect via register. Allows 2n2^n addressability beyond field size but extra memory access.

5. Register Mode
Operand in register, field specifies register.
EA=REA = R
Example: MOV A, B -> A←BA\leftarrow B; ADD R1 -> AC←AC+R1AC\leftarrow AC+R1; INC AX. Fastest, no memory.

6. Register Indirect Mode
Field specifies register holding EAEA. EA=(R)EA = (R).
Example: MOV A, M where H-L holds address (8085: MOV A, M with HL=2050HHL=2050H => A←M[2050H]A\leftarrow M[2050H]); 8086: MOV AX, [BX] where BX=1000HBX=1000H => AX←M[1000H]AX\leftarrow M[1000H]. LDA (R1) etc.

7. Indexed / Auto-increment Mode (bonus)
EA=Base+Index registerEA = \text{Base} + \text{Index register}; useful for arrays.
Example: LOAD X(R1) where R1R1=index, EA=X+R1EA=X+R1 -> AC←M[X+R1]AC\leftarrow M[X+R1].
Auto-increment: MOV (R1)+, R2 -> operand at (R1)(R1) then R1++R1++ for sequential access.
8086: MOV AX, [SI+1000H].

8. Relative / PC-relative Mode
EA=PC+offsetEA = PC + \text{offset} (offset in field). For branching.
Example: BNE -5 -> PC←PC−5PC\leftarrow PC-5 if condition; 8086 JZ 08H is PC+8PC+8.

9. Base Register Mode
EA=Base register+displacementEA = \text{Base register} + \text{displacement}. For relocatable code/structures.
Example: LDA 20(Rbase).

Mode Cycles When used
Immediate 1 fetch Constants
Direct 1 mem Global variable
Indirect 2 mem Pointers
Register 0 mem Temporaries
Indexed 1 mem+add Arrays/loops

Effective programming uses mixture; RISC favors register+immediate, CISC supports all.

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