2015 question paper
COMPUTER ORGANIZATION & ARCHITECTURE
17 questions
Q1a. What is the difference between Programmed I/O and Interrupt-driven I/O?20152m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →What is the difference between Programmed I/O and Interrupt-driven I/O?
Q1b. Explain different types of interrupts.20152m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Explain different types of interrupts.
Q1c. Define program counter.20152m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Define program counter.
Q1c. Describe the phases in an instruction cycle.20152m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Describe the phases in an instruction cycle.
Q1e. What do you mean by direct memory access?20152m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →What do you mean by direct memory access?
Q1f. What is the difference between hardwired control and microprogrammed control?20152m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →What is the difference between hardwired control and microprogrammed control?
Q1g. What is the importance of cache memory in a computer?20152m
Module 4: Memory Organization
View this question on its own page →What is the importance of cache memory in a computer?
Q1h. Briefly explain subroutine call and return.20152m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Briefly explain subroutine call and return.
Q1i. What do you mean by array processors? How are they different from scalar processors?20152m
Module 3: Pipelining
View this question on its own page →What do you mean by array processors? How are they different from scalar processors?
Q2. Explain in detail the different addressing modes.201514m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Explain in detail the different addressing modes.
Q3. Explain in detail the hierarchical memory structure with a neat and labelled diagram.201514m
Module 4: Memory Organization
View this question on its own page →Explain in detail the hierarchical memory structure with a neat and labelled diagram.
Q4. What is swapping and how is it useful in memory management?201514m
Module 4: Memory Organization
View this question on its own page →What is swapping and how is it useful in memory management?
Q5. How does a DMA controller work? Explain with an example.201514m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →How does a DMA controller work? Explain with an example.
Q6. Define paging in memory management and write its advantages.201514m
Module 4: Memory Organization
View this question on its own page →Define paging in memory management and write its advantages.
Q7. Explain in detail daisy-chain priority interrupt.201514m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Explain in detail daisy-chain priority interrupt.
Q8. Explain in detail the three mapping procedures related to cache memory.201514m
Module 4: Memory Organization
View this question on its own page →Explain in detail the three mapping procedures related to cache memory.
Q9. Explain in detail the handshake protocol of asynchronous data transfer201514m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Explain in detail the handshake protocol of asynchronous data transfer