2016 question paper
COMPUTER ORGANIZATION & ARCHITECTURE
18 questions
Q1a. (a) Write the range of decimal integer that can be represented by *n-bit 1’s complement representation.*20162m
Module 1: Functional Block of computer and Data representaion
View this question on its own page →(a) Write the range of decimal integer that can be represented by n-bit 1’s complement representation.
Q1b. What is zero address instruction format?20162m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →What is zero address instruction format?
Q1c. What do you mean by interrupt-initiated I/O?20162m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →What do you mean by interrupt-initiated I/O?
Q1d. What do you mean by cache coherence problem?20162m
Module 4: Memory Organization
View this question on its own page →What do you mean by cache coherence problem?
Q1e. How many 128 × 8 RAM chips are needed to provide a memory capacity of 2048 bytes?20162m
Module 4: Memory Organization
View this question on its own page →How many 128 × 8 RAM chips are needed to provide a memory capacity of 2048 bytes?
Q1f. Briefly explain the conflicts in instruction pipeline.20162m
Module 3: Pipelining
View this question on its own page →Briefly explain the conflicts in instruction pipeline.
Q1g. Explain the use of subroutine with the help of suitable example.20162m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Explain the use of subroutine with the help of suitable example.
Q1h. What is a micro-operation? Explain the four categories of the most common micro-operations.20162m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →What is a micro-operation? Explain the four categories of the most common micro-operations.
Q1i. Define hit ratio and explain its significance.20162m
Module 4: Memory Organization
View this question on its own page →Define hit ratio and explain its significance.
Q2. With neat block diagram, explain how DMA controller is initialized for DMA data transfer.201614m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →With neat block diagram, explain how DMA controller is initialized for DMA data transfer.
Q3. Discuss Flynn’s classification of computer.201614m
Module 3: Pipelining
View this question on its own page →Discuss Flynn’s classification of computer.
Q4. What is associative memory? Explain with the help of a block diagram. Also mention the situation in which associative memory can be effectively utilized.201614m
Module 4: Memory Organization
View this question on its own page →What is associative memory? Explain with the help of a block diagram. Also mention the situation in which associative memory can be effectively utilized.
Q5. Discuss the different ways in which ROM can be programmed.201614m
Module 4: Memory Organization
View this question on its own page →Discuss the different ways in which ROM can be programmed.
Q6. What is meant by pipelining? Why do we require instruction pipelining? Explain its working procedure. Discuss the pipeline performance measures.201614m
Module 3: Pipelining
View this question on its own page →What is meant by pipelining? Why do we require instruction pipelining? Explain its working procedure. Discuss the pipeline performance measures.
Q7. A virtual memory system has an address space of 8k words, memory space of 4k words and page & block size of 1k words. The following page reference changes occur during a given time interval: 4, 2, 0, 1, 2, 6, 1, 4, 0, 1, 0, 2, 3, 5, 7 Determine the four pages that are resident in main memory after each page reference change if the replacement algorithm used is - (i) FIFO - (ii) LRU.201614m
Module 4: Memory Organization
View this question on its own page →A virtual memory system has an address space of 8k words, memory space of 4k words and page & block size of 1k words. The following page reference changes occur during a given time interval:
4, 2, 0, 1, 2, 6, 1, 4, 0, 1, 0, 2, 3, 5, 7
Determine the four pages that are resident in main memory after each page reference change if the replacement algorithm used is- (i) FIFO
- (ii) LRU.
Q8. Explain the Strobe Control method of asynchronous data transfer. What are the disadvantages of this method?201614m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Explain the Strobe Control method of asynchronous data transfer. What are the disadvantages of this method?
Q9a. Write short notes on the following: - (a) Shift instructions20167m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Write short notes on the following:
- (a) Shift instructions
Q9b. Write short notes on the following: - (b) Daisy chaining priority20167m
Module 2: x86 Architecture, CPU Control, I/O, Memory System Design
View this question on its own page →Write short notes on the following:
- (b) Daisy chaining priority