Cache Coherence Problem:

Occurs in multiprocessor / multi-cache systems where multiple caches may hold copies of the same memory block.

If one processor (P1) writes to its cached copy of block X, other caches holding X become stale/inconsistent with main memory and with each other. Subsequent reads by other processors would get old data.

• Problem: Ensuring all caches and main memory see a consistent view of shared data after writes.
• Solutions: Snooping protocols (write-invalidate, write-update / write-broadcast), directory-based protocols, MESI state machine.

Without coherence, program correctness is violated.