Handshake Protocol of Asynchronous Data Transfer (14 Marks)

Asynchronous transfer is used when source and destination have different speeds/clocks, without common clock. Handshake uses control signals (Ready/Valid/Acknowledge or STROBE/ACK) to synchronize.

Need: Strobe method (single control pulse) is not reliable – source doesn't know if destination accepted data. Handshake solves by two-way signaling.

Two Types:

1. Source-Initiated (Unidirectional):
Sequence:
a) Source places data on bus
b) Source asserts Data Valid / STROBE
c) Destination accepts data, asserts Data Accepted / ACK
d) Source deasserts Data Valid after seeing ACK
e) Destination deasserts ACK – ready for next cycle

Timing diagram: Data → Valid ↑ → ACK ↑ → Valid ↓ → ACK ↓

2. Destination-Initiated:
Used when destination requests data (e.g., input device).
a) Destination asserts Request Data / Ready to Receive
b) Source places data and asserts Data Valid
c) Destination accepts and deasserts request / asserts ACK
d) Source deasserts Valid, etc.

Full Handshakes:

• 2-Edge (Non-Interlocked) vs 4-Edge (Fully Interlocked): 4-edge uses both rising and falling edges as events (request high → ack high → request low → ack low) – more reliable, used in buses.

• Application: In CPU-I/O interface: CPU addresses device, device asserts ACK when ready; Data transferred over bus with MSTRB/SLVACK. Example: 8085 handshaking with STB, IBF in 8255 PPI mode 1.

Advantages: Speed independent, reliable, no clock skew.
Disadvantage: Extra handshake time reduces throughput vs synchronous burst.

Block diagram: Source register → Bus → Dest register with two control lines between controllers. Sequence controlled by handshake controller FSMs on both sides.