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Module 1: Functional Block of computer and Data representaion

20222m

(d) The instruction fetch phase ends with

(i) placing the data from the address in MAR into MDR

(ii) placing the address of the data into MAR

(iii) completing the execution of the data and placing its storage address into MAR

(iv) decoding the data in MDR and placing it in IR

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Answer: (iv) decoding the data in MDR and placing it in IR

Explanation:
Instruction Fetch Cycle steps:

  1. MAR ← PC - place address of next instruction in MAR
  2. MDR ← M[MAR] - read memory word into MDR (option i)
  3. IR ← MDR - transfer instruction to Instruction Register and decode
  4. PC ← PC + 1

The phase ends when instruction is available in IR for decode/execution. Option (ii) is start of fetch, (i) is middle. Hence (iv) is correct. Note: Some texts stop fetch at MDR loading (i), but classical fetch-decode cycle includes IR loading as final step.

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