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Module 4: Memory Organization

20237m

Write short notes on: Locality of reference

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Locality of Reference [7M]

Principle: Program memory access is not random but clustered. Observed empirically (Denning, 1968). Foundation for cache, virtual memory and hierarchy design. 90%90\% execution time in 10%10\% code.

1. Types:

  • Temporal Locality: If location XX is referenced at time tt, it will likely be referenced again soon (near future).
    Reason: Loops, reuse of variables, stack, counters.
    Example:

    for(i=0;i<1000;i++) sum += a[i]; // `sum` reused every iteration
    

    sum accessed every iteration -> temporal.

  • Spatial Locality: If location XX is referenced, nearby locations X+ΔX+\Delta will likely be referenced soon.
    Reason: Sequential instruction execution, array traversal, contiguous structures.
    Example: a[0], a[1], a[2]... contiguous words -> fetching a[i] brings cache block of 64B (8 words) -> next 7 accesses are hits. Instructions are sequential as well.

  • Sequential Locality: Special case of spatial - next instruction is PC+1PC+1 unless branch.

2. Implications / Applications:

  • Cache Memory: Block size >1>1 word exploits spatial locality. Upper level stores working set exploiting temporal. LRU replacement exploits temporal. Without locality, hit ratio →0\to 0 and cache useless.
  • Virtual Memory / Paging: Keep working set in RAM; pages brought on locality basis. Thrashing occurs when locality violated / working set exceeds frames.
  • Prefetching: Hardware prefetcher fetches next linenext\ line based on spatial.
  • Branch prediction & instruction cache: Sequential locality predicts next fetch.
  • Quantified: Hit ratio h≈0.9−0.98h \approx 0.9-0.98 for L1 when locality high. Effective access time: Teff=h⋅Tcache+(1−h)⋅TmemoryT_{eff}= h\cdot T_{cache} + (1-h)\cdot T_{memory} -> makes Teff≈TcacheT_{eff}\approx T_{cache}.

3. Working Set Theory:

Denning: W(t,τ)W(t,\tau) = set of pages referenced in last τ\tau references. Locality implies ∣W∣|W| small (e.g. 2-4 pages) vs total size. OS tries to keep WW resident. If ∑Wi>\sum W_i > physical memory -> thrashing.

4. Example Calculation:

Loop touches 1K word array stride 1 with 64B block (16 words):
Without spatial exploitation: 1000 misses. With block: ≈1000/16=63\approx 1000/16 =63 misses -> 93% hit rate due to spatial.

5. Violations:
Linked list with nodes scattered, random pointer chasing, large stride >blocksize> block size defeats spatial locality; large data set with no reuse defeats temporal -> cache pollution.

Conclusion: Locality of reference bridges speed gap between CPU and memory; hierarchy design (register-cache-main-disk) succeeds only because of it.

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