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Module 3: Instruction Set and Programming

20212m

What is the possible range of transfer control for 8-bit relative address especially in 2's complement form with respect to the first byte of preceding instruction?
(i) -115 to 132 bytes
(ii) -130 to 132 bytes
(iii) -128 to 127 bytes
(iv) -115 to 127 bytes

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Answer: (iii) -128 to 127 bytes

Explanation: Relative addressing in 8051 (SJMP, conditional jumps JC/JNC, JZ/JNZ, DJNZ, CJNE) uses an 8-bit signed offset added to PC after fetching the jump instruction. 8-bit 2's complement range is -128 to +127 bytes relative to the first byte of the next instruction (PC after fetch). Some textbooks quote -128 to +127 relative to current PC. Hence the range is -128 to +127.

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