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Module 2: x86 Architecture, CPU Control, I/O, Memory System Design

20197m

Explain register reference and memory reference instructions in detail with suitable examples.

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Register Reference vs Memory Reference Instructions (Mano Basic Computer - 16-bit)

In Mano's Basic Computer, instructions are 16-bit: I (15) | Opcode (14-12) | Address (11-0). Whether an instruction is Memory-reference, Register-reference or I/O is decided by the opcode and I bit.

1. Memory Reference Instructions ( I×212+opcodeI \times 2^{12} + opcode )

Opcode 000 to 110 with I=0/1I=0/1 = 7 instructions. Bits 11-0 give memory address; I=0I=0 = direct, I=1I=1 = indirect (EA = M[address]).

Opcode Symbol Operation Example
000 AND AC←AC∧M[EA]AC \leftarrow AC \land M[EA] AND 100 / AND I 100
001 ADD AC←AC+M[EA]AC \leftarrow AC + M[EA] ADD 200
010 LDA AC←M[EA]AC \leftarrow M[EA] LDA 300
011 STA M[EA]←ACM[EA] \leftarrow AC STA 400
100 BUN PC←EAPC \leftarrow EA BUN 500 Unconditional branch
101 BSA M[EA]←PC,  PC←EA+1M[EA]\leftarrow PC,\; PC\leftarrow EA+1 BSA 600 Branch & save return
110 ISZ M[EA]←M[EA]+1M[EA]\leftarrow M[EA]+1, if M[EA]=0M[EA]=0 then PC←PC+1PC\leftarrow PC+1 (skip) ISZ 700

Format: 1xxx xxxx xxxx xxxx where xxx=opcode.
E.g. LDA 0x005 direct: 0 010 000000000101 = 0x2005; indirect: 1 010 000000000101 = 0xA005.

Executed in Fetch -> Decode -> Execute using T0−T4T_0-T_4. Need memory access in execute phase.

2. Register Reference Instructions

Recognized when opcode = 111 and I=0 (IR = 0111 0xxx xxxx xxxx). Bits 11-0 specify which micro-operation on AC, E, etc. No memory access, executed in one cycle (T3T_3). Bit =1 means operation performed; multiple bits can be 1 together.

Bit Symbol Micro-operation
11 CLA 7800 AC←0AC \leftarrow 0
10 CLE 7400 E←0E \leftarrow 0
9 CMA 7200 AC←AC‾AC \leftarrow \overline{AC}
8 CME 7100 E←EˉE \leftarrow \bar{E}
7 CIR 7080 AC,E←shr(AC,E)AC,E \leftarrow shr(AC,E)
6 CIL 7040 AC,E←shl(AC,E)AC,E \leftarrow shl(AC,E)
5 INC 7020 AC←AC+1AC \leftarrow AC+1
4 SPA 7010 If AC(15)=0AC(15)=0 then PC←PC+1PC\leftarrow PC+1 (skip if positive)
3 SNA 7008 Skip if ACAC negative
2 SZA 7004 Skip if AC=0AC=0
1 SZE 7002 Skip if E=0E=0
0 HLT 7001 S←0S\leftarrow 0 halt

E.g. CLA = 0111 1000 0000 0000 = 0x7800; CMA INC (complement and increment = negate) = 0x7200|0x7020 = 0x7220.

Key difference:

Feature Memory-Reference Register-Reference
Opcode 000-110 111
I bit selects direct/indirect must be 0
Operands in Memory in AC/E/PC
Cycles needs M[EA]M[EA] access single micro-op, no memory
Example ADD 0100 does AC+M[0100]AC+M[0100] CLA clears AC

I/O instructions are third type: opcode 111, I=1, bits 11-0 select I/O micro-op e.g. INP, OUT.

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