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COMPUTER ORGANIZATION & ARCHITECTURE(3). Consider a hypothetical 32-bit microprocessor having 32-bit instructions composed of two fields—the first byte contains the opcode and the remainder the immediate operand or an operand address. (a) What is the maximum directly addressable memory capacity (in bytes)? (b) Discuss the impact on the system speed if the microprocessor bus has— i) a 32-bit local address bus and a 16-bit local data bus, or ii) a 16-bit local address bus and a 16-bit local data bus. \(c\) How many bits are needed for the program counter and the instruction register?202214mCOMPUTER ORGANIZATION & ARCHITECTUREHow many 128×8 bit RAMs are required to design 32 k x 32 bit RAM? - (i) 512 - (ii) 128 - (iii) 1024 - (iv) 3220192mCOMPUTER ORGANIZATION & ARCHITECTUREHow many 128x8 bit RAMs are required to design 32 kx 32 bit RAM? (i) 512 (ii) 128 (iii) 1024 (iv) 3220232mMICROPROCESSORSWhich type of memory in 8051 is bit-addressable? (i) Entire RAM (ii) Register bank (iii) 16 bytes of internal RAM from 20H to 2FH (iv) Entire ROM20242m
Previous__________________ Addressing mode directly specifies the operand within the instruction. i. Direct addressing ii. Indirect addressing iii. Immediate addressing iv. Indexed addressingNextDescribe the instruction execution cycle in a CPU. Explain some key features of the x86 architecture
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