Architecture of 8-bit Microprocessor (8085)

Same as Q143/Q64: Comprises ALU 8-bit, register array (B,C,D,E,H,L, A, FLAGS, PC, SP, temp W,Z), Instruction Register & Decoder, Timing & Control Unit, Interrupt Control, Serial I/O, Address/Data buffers, Oscillator.
Working cycle: Fetch (M→IR), Decode, Execute (ALU/mem/reg). Bus structure: 16-bit address (A15-A0), 8-bit data (AD7-AD0 multiplexed with ALE), control (RD, WR, IO/M). Stack grows, interrupts vectored. Von Neumann memory. Clocks generate T-states. This compact diagram explains complete operation.