Why Interrupt-Driven I/O is More Efficient

Programmed I/O (Polling): CPU continuously checks (polls) device status flag Ready/Busy in a loop until device is ready. During polling CPU is blocked, wastes thousands of cycles, cannot do useful work.

Interrupt-Driven I/O: CPU initiates I/O, then continues executing current program. I/O device signals readiness by asserting an interrupt request (INTR/IRQ). CPU is interrupted only when needed, so no busy-wait. Efficiency is high especially for slow devices (keyboard, disk) where waiting time >> transfer time.

Advantages: CPU not wasted in polling loops, allows concurrent computation and I/O (overlap), enables handling of asynchronous events, supports priority handling.

Sequence of Operations in Interrupt-Driven Transfer

Assume CPU → enables interrupts, issues I/O command to Interface.

1. Device prepares data: Interface sets Ready or fills buffer.
2. Interrupt Request: Interface asserts INTR line to CPU.
3. Interrupt Acknowledgement: After completing current instruction, CPU checks INTR if Interrupt Enable (IE)=1 and no higher priority interrupt.
4. Save context: CPU pushes Program Counter (PC) and Processor Status Word (PSW) onto stack, disables further interrupts (clears IE), branches to interrupt vector address.
5. Vectoring: CPU fetches ISR address from Interrupt Vector Table using interrupt vector number supplied by device (or via daisy chain/priority encoder).
6. Interrupt Service Routine (ISR):
   a. Save registers (if not done by HW).
   b. Poll device status / identify source if multiple devices share line.
   c. Transfer data: For input - read data register → memory/accumulator; For output - write data. If block transfer, loop or initiate next byte.
   d. Clear interrupt flag in device interface.
   e. Restore registers.
7. Return from Interrupt: Execute IRET / RTI → restores PC and PSW (re-enables interrupts).
8. Resume: CPU resumes interrupted program from next instruction.

For vectored priority interrupt the device identifies itself; for non-vectored, CPU polls devices branch.

Timing: CPU overhead is only saving/restoring + ISR execution, versus continuous polling. DMA further improves efficiency by transferring block without per-word ISR.