One-, Two- and Three-Address Instructions

Based on number of address fields in instruction format. Trade-off: code size vs registers vs memory accesses.

1. Three-Address Instruction

• Format: OPCODE Destination, Source1, Source2 e.g., ADD R1, R2, R3 => R1 <- R2 + R3
• 3 address fields: 2 sources, 1 destination. All operands can be registers/memory.
• Example:

  ADD R1, R2, R3   ; R1 = R2 + R3
  MUL R4, R1, R2   ; R4 = R1 * R2
  ADD R1, R2, M[X] ; R1 = R2 + M[X]  (if memory allowed)
  Evaluate X=(A+B)*(C+D):  ADD R1,A,B ; ADD R2,C,D ; MUL X,R1,R2
  

• Pros: Most expressive, one instruction per operation, compiler friendly, shorter program (fewer instructions). Good for RISC with many registers.
• Cons: Long instruction word (e.g., 4+4+4+4=16-32 bits), needs 3 register fields, large code size if memory addresses are long.

2. Two-Address Instruction

• Format: OPCODE Destination, Source => Destination <- Destination OP Source
• One field is both source and destination (accumulative).
• Example:

  MOV R1, R2   ; R1 <- R2
  ADD R1, R2   ; R1 <- R1 + R2
  ADD R1, X    ; R1 <- R1 + M[X]
  For X=(A+B)*(C+D): MOV R1,A ; ADD R1,B ; MOV R2,C ; ADD R2,D ; MUL R1,R2 ; MOV X,R1
  

• Popular in CISC (Intel x86): ADD AX, BX , MOV AX, [500H]
• Pros: Shorter than 3-address (saves one field), still flexible, fewer bits.
• Cons: Destructive (source overwritten) -> extra MOV needed, more instructions than 3-address.

3. One-Address Instruction (Accumulator-based)

• Format: OPCODE Address => AC <- AC OP M[Address] (one implicit accumulator)
• Second operand implicit in AC (Accumulator). Result back to AC.
• Example (Mano basic computer):

  LDA X   ; AC <- M[X]
  ADD Y   ; AC <- AC + M[Y]
  STA Z   ; M[Z] <- AC
  For X=(A+B)*(C+D): LDA A ; ADD B ; STA T1 ; LDA C ; ADD D ; STA T2 ; LDA T1 ; MUL T2 ; STA X  (needs temp)
  

• Pros: Shortest instruction (opcode + one address), minimal hardware (one register).
• Cons: Many instructions needed, temporary memory storage, AC becomes bottleneck, high memory traffic.

Comparison Table

Type	Addresses	Example	Instructions for (A+B)*(C+D)	Length
3-address	3	ADD R1,A,B	3	Longest
2-address	2	ADD R1,A	6	Medium
1-address	1 + AC	LDA A	8-9	Shortest
0-address	0 (Stack)	PUSH A; ADD	8 + stack ops	Stack machine

Modern RISC (ARM, MIPS) uses 3-address register-register, x86 uses 2-address, older machines (8085, Mano) use 1-address accumulator. Choice depends on register file size and instruction length constraints.