Given: Common bus with 16 registers, each 32 bits, bus built from multiplexers.

We construct bus by bit-slicing: one multiplexer per bit position that selects same source register bit across all registers.

(i) Number of selection inputs per multiplexer

To select 1 of 16 sources, number of select lines $s$ satisfies $2^{s} \ge 16$.

$$s = \lceil \log_{2}16 \rceil = 4$$

So each multiplexer needs 4 select lines ($S_3S_2S_1S_0$). A 4-bit binary code chooses register $0\text{-}15$ (decoder internal to mux).

If enable considered, $4$ selects + $1$ enable.

(ii) What size multiplexers are needed? / How many?

• Size per multiplexer: $16\text{:}1$ (16 data inputs → 1 output). Strictly $16\times1$ MUX.
• Number of multiplexers: One per bit slice → 32 multiplexers, each $16\!:\!1$.

Total $32 \times 16 = 512$ data input lines, 32 outputs form the 32-bit bus. Selection inputs (4 lines) are common to all 32 muxes.

Implementation note: If only $4{:}1$ mux ICs available, each $16{:}1$ can be built from five $4{:}1$ muxes (4 first-level +1 second-level), requiring $32\times5=160$ chips. With $8{:}1$ muxes, $2+1$ per bit.