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COMPUTER ORGANIZATION & ARCHITECTUREWrite the sequence of control steps required for three-bus structure for the following instruction: - Add R4, R5, R620142mCOMPUTER ORGANIZATION & ARCHITECTUREWhat is a micro-operation? Explain the four categories of the most common micro-operations.20162mCOMPUTER ORGANIZATION & ARCHITECTUREA digital computer has a common bus system of 16 registers of 32 bits each. The bus is constructed with multiplexers. - (i) How many selection inputs are there in each multiplexer? - (ii) What size of multiplexers is needed?20197mCOMPUTER ORGANIZATION & ARCHITECTURE(3). Consider a hypothetical 32-bit microprocessor having 32-bit instructions composed of two fields—the first byte contains the opcode and the remainder the immediate operand or an operand address. (a) What is the maximum directly addressable memory capacity (in bytes)? (b) Discuss the impact on the system speed if the microprocessor bus has— i) a 32-bit local address bus and a 16-bit local data bus, or ii) a 16-bit local address bus and a 16-bit local data bus. \(c\) How many bits are needed for the program counter and the instruction register?202214m
PreviousBriefly explain the two basic approaches used to minimize register-memory operations on RISC machines.NextLet a be the percentage of a program code that can be executed simultaneously by n processors in a computer system. Assume that the remaining code must be executed sequentially by a single processor. Each processor has an execution rate of x MIPS. (a) Derive an expression for the effective MIPS rate when using the system for exclusive execution of this program, in terms of n, \alpha, and x. (b) If n=16 and x=4 MIPS, determine the value of that will yield a system performance of 40 MIPS.