MICROPROCESSORS

Answer: (ii) Microprocessor

Explanation: The microprocessor is called the brain of a microcomputer system. It is the central processing unit (CPU) on a single chip that performs fetch-decode-execute cycles, ALU operations, control, and timing for the entire system. RAM/ROM are memories and ALU is only a part of the microprocessor. Therefore the microprocessor is the brain.

Answer

Correct Option: (ii) 5

Explanation

The 8085 microprocessor has 5 flags in its flag register (also called Status Register or Flag Register):

Flag	Name	Symbol	Purpose
S	Sign	S	Set if MSB of result = 1 (negative)
Z	Zero	Z	Set if result = 0
AC	Auxiliary Carry	AC	Carry from bit 3 to bit 4 (BCD)
P	Parity	P	Set if result has even parity
CY	Carry	CY	Carry out of MSB / Borrow

Total = 5 flags

Notes

• Flag register is 8-bit, but only 5 bits are used (bits 0,1,2,4,6 typically).
• Bits 3 and 5 are reserved/unused in 8085.
• 8086 has 9 flags (adds OF, DF, IF, TF).
• Z80 has 4 flags in F register (S,Z,HC,P/V,N,C).

Final Answer

8085 has 5 flags → Option (ii)

Answer: (iv) D

Explanation: In 8085 (and 8086-compatible 8-bit register pairing for 16-bit operations), the general-purpose registers are paired as:

• B-C → B is high byte, C low byte
• D-E → D is high byte, E low byte
• H-L → H is high byte, L low byte

For 16-bit data operations (LXI, DAD, STAX/LDAX, LHLD/SHLD using H-L), E must be paired with D to form the 16-bit register pair D-E. Similarly in some textbooks "E can be paired with D" for 16-bit moves. Option (iv) D is correct.

Answer: (i) ALE

Explanation: ALE (Address Latch Enable) is the 8051 output that pulses high during state T1 of each machine cycle to latch the low-byte address (P0) into an external latch (74LS373). It then goes low and remains low (deactivated) during T2 and onwards for that cycle, while \overline{PSEN} (active-low) goes low during the fetch phase. \overline{EA} is an input. So the signal that becomes high in T1 and stays deactivated thereafter is ALE.

Answer: (iii) Intel 8051

Explanation: 8051 uses Harvard architecture (separate program and data memory spaces, with separate buses, PSEN for program, RD/WR for data, can access both simultaneously). Intel 8085 and 8086 are Von Neumann (or Von Neumann-like with unified memory) and ARM Cortex is typically Von Neumann / modified Harvard but question lists 8051 as the classic Harvard example among options. 8051 has distinct 64K program + 64K data spaces.**

Answer: (ii) Microcontroller based systems

Explanation: Microcontrollers are single-chip systems with on-chip ROM + RAM + I/O optimized for control tasks, so they need small RAM relative to ROM (code heavy). Microprocessor-based systems use large external RAM for general computing. Hence RAM:ROM ratio is lower in microcontroller-based systems.

Answer: (iii) 8031

Explanation: MCS-51 family: 8051 = 4KB ROM, 8052 = 8KB, 8031 = 0KB internal ROM (ROMless version requiring external program memory,
EA\ must be grounded). 8751 = EPROM, 8951/AT89C51 = Flash. Hence 8031 has 0KB internal ROM.

Answer: (iv) All of the above

Explanation: Embedded system design metrics are tightly constrained: single-chip integration (size/cost), low power (battery operation), and real-time fast processing. Additional constraints include reliability, cost, NRE, flexibility. Hence all listed are essential constraints.

Answer: (iv) 5

Explanation: 8085 has 5 hardware interrupts in priority order: TRAP (highest, non-maskable), RST 7.5, RST 6.5, RST 5.5, and INTR (lowest). TRAP is vector 0024H, RST 7.5 003CH, 6.5 0034H, 5.5 002CH.

8-bit Microprocessor Architecture (e.g., 8085) – Block Diagram Description

Block diagram components:

[Address Bus 16-bit] ← Address Buffer ← Program Counter & Stack Pointer
[Data Bus 8-bit] ↔ Data Buffer ↔ Instruction Register & Accumulator
Control Bus ↔ Timing & Control Unit ↔ Clock (Crystal)
CPU: ALU (8-bit) + Flags (S,Z,AC,P,CY), General Registers B,C,D,E,H,L, Temp registers W,Z
Interrupt Control (TRAP,RST7.5,6.5,5.5,INTR)
Serial I/O

Function of blocks:

1. ALU: 8-bit add/sub/logic, with flags.
2. Registers: B-C,D-E,H-L pairs for 16-bit ops, Accumulator, PC (16-bit), SP (16-bit).
3. Timing & Control: Generates RD, WR, ALE, IO/M, FETCH, decode and sequencing.
4. Instruction Decoder & Register: Decodes opcode from IR.
5. Address/Data buffers: Drive external buses.
6. Oscillator: Crystal drives internal clocks (T-states → Machine cycles → Instruction cycles).
   Working: Fetch PC→MAR→address bus, RD low, instruction→MDR→IR, decode, execute with ALU/register/memory, increment PC, handle interrupts. Harvard not applicable, Von Neumann unified memory. This architecture enables fetch-decode-execute loop with stack and interrupts.

Embedded System – Salient Features & Characteristics

Definition: Embedded system is a dedicated computer + software hidden inside a product to perform specific control/monitoring.

Salient Features:

1. Single/defined function - optimized for one task.
2. Real-time operation - must respond within deadlines (hard/soft real-time).
3. Resource constrained - limited memory, CPU, power.
4. Reliability & stability - long uptime without failure.
5. Low cost, small size, low power - mass-produced.
6. Hardware-Software co-design - tightly coupled.
7. Interactive & reactive - responds to sensors/environment.
8. Microcontroller/SoC based - integrates CPU, memory, I/O on chip.

Characteristics:

• Application specific, firmware in ROM/Flash.
• Minimal UI or headless.
• Uses cross-development tools.
• Often has no or small OS (RTOS).
• Must tolerate temperature, EMI as per deployment.
• Examples differentiate from general-purpose computer which is programmable for many tasks.

Embedded System – Definition & Architecture

Definition: An embedded system is a computing system designed to perform dedicated functions within a larger mechanical/electrical system, with tight constraints on cost, size, power, and real-time response. It contains a microprocessor/microcontroller, memory, I/O, and firmware.

Architecture Block Diagram (describe):

[Sensors/Input]→[Signal Conditioning]→[ADC]→|    Central Unit    |→[DAC/Drivers]→[Actuators/Output]
                                      |  Processor (8051/ARM) |
                                      |  Memory: ROM/Flash,   |
                                      |   RAM, Cache          |
                                      |  Timers/Counters,     |
                                      |  Interrupt Controller |
                                      |  Communication: UART, |
                                      |  SPI, I2C, USB, ETH  |
                                      |  I/O Ports, Power Mgmt|
                                      +-----------+------------+
                                                    |
                                             [Software/Firmware]

Components:

1. Processor core: 8051, ARM, AVR, PIC – executes firmware.
2. Memory: Program Flash/ROM, Data RAM, EEPROM for parameters.
3. I/O & Peripherals: GPIO, timers, ADC/DAC, PWM, interrupts.
4. Sensors/Actuators: Input physical signals, output control.
5. Communication: RS232, I2C, SPI, CAN, USB, Zigbee/BT for connectivity.
6. Power & Clock: Oscillator, reset, power management.
7. Software: Real-time OS or bare-metal C/assembly.

Characteristics: Single function, real-time, resource-constrained, reliable, low cost. Examples: Washing machine, automotive ECU, medical device.

Advantages & Disadvantages of Embedded Systems

Advantages:

1. Dedicated function → optimized performance, low cost mass production.
2. Small size, low power, single-chip reliability.
3. Real-time response, deterministic.
4. Tight hardware-software integration, easy automation (automotive, medical, appliances).
5. Scalable & robust, long lifecycle.

Disadvantages:

1. Limited resources (memory, CPU) → no general-purpose flexibility.
2. Difficult to upgrade; firmware changes require reflash/cross-development.
3. Hard real-time & testing complexity, longer development, need for cross-compilers/debuggers.
4. Power/thermal constraints in battery devices.
5. Security vulnerability if not updated.

Tradeoff vs General-purpose: Embedded wins on cost/power/size for single task, loses on flexibility/performance for complex computing.

MCS-51 in Embedded Systems

MCS-51 (8051) is ideal for small embedded control because:

1. Single-chip: 4KB ROM, 128B RAM, 32 I/O, 2 timers, UART, interrupts on chip → minimal external hardware.
2. Bit addressability & Boolean processor → efficient control logic.
3. Real-time: Timer/counter, external interrupts INT0/1, serial for communication.
4. Low cost & power, mature tools: Keil C, many derivatives (Atmel, NXP), wide industrial support.
5. Interfacing: Direct to sensors (ADC), LCD, keypad, stepper/motor,7-seg, I2C/SPI bridges.
   Use cases: washing machine, traffic controller, medical pump, automotive, industrial automation. Limited for high-performance (use ARM for 32-bit), but still dominates 8-bit control.

Architecture of 8-bit Microprocessor (8085)

Same as Q143/Q64: Comprises ALU 8-bit, register array (B,C,D,E,H,L, A, FLAGS, PC, SP, temp W,Z), Instruction Register & Decoder, Timing & Control Unit, Interrupt Control, Serial I/O, Address/Data buffers, Oscillator.
Working cycle: Fetch (M→IR), Decode, Execute (ALU/mem/reg). Bus structure: 16-bit address (A15-A0), 8-bit data (AD7-AD0 multiplexed with ALE), control (RD, WR, IO/M). Stack grows, interrupts vectored. Von Neumann memory. Clocks generate T-states. This compact diagram explains complete operation.

Address/Data Separation on 8085

8085 has multiplexed AD7-AD0 (low address + data) to save pins.

Mechanism:

• T1 of machine cycle: ALE (Address Latch Enable) high → AD7-AD0 carries A7-A0. External latch (74LS373) captures it when ALE falls. A15-A8 already stable on high bus.
• T2-T3: ALE low → AD7-AD0 now becomes D7-D0 bidirectional data bus for read/write. Control signals IO/M, RD, WR determine direction.
• Demultiplexing: ALE→LE of 74LS373 latches address; after that data flows.

Thus address and data share pins time-multiplexed, separated by ALE timing, enabling 16-bit address with 8-bit data on 40-pin package. Equivalent in 8051 Port0 behaves similarly.

Microprocessor vs Microcontroller – 4 Differences

Aspect	Microprocessor	Microcontroller
1. Integration	CPU only, needs external memory/I/O	CPU+RAM+ROM+I/O+timers on single chip
2. Cost/Size	Higher system cost, larger PCB	Low cost, compact
3. Applications	General-purpose computing (PC)	Dedicated control (appliances, automotive)
4. Power & Performance	High speed, high power	Low-mid speed, low power
Extra: MP uses Von Neumann external buses, MC Harvard on-chip. MP needs more support ICs, MC single-chip.

20 Items with Built-in Microcontroller

1. Washing machine 2. Microwave oven 3. TV remote / TV 4. Air conditioner 5. Automobile ECU (ABS, engine) 6. Mobile phone 7. Printer 8. Keyboard/mouse 9. MP3 player 10. Digital camera 11. Elevator controller 12. Pacemaker 13. Smart watch 14. Traffic light controller 15. ATM machine 16. Digital thermometer 17. Toys (RC) 18. Solar inverter 19. Drone 20. Smart meter / IoT sensor node.

Buses in Microprocessor

• Address Bus: Unidirectional, carries address from CPU to memory/I/O. Size = addressing capacity (16-bit →64K). Example P2+P0 in 8051, A15-A0 in 8085.
• Data Bus: Bidirectional, carries data CPU↔memory/peripherals. 8-bit in 8051/8085 AD7-0.
• Control Bus: Carries control signals: \overline{RD}, \overline{WR}, ALE, IO/\overline{M}, \overline{PSEN}, \overline{EA}, READY, HOLD. Timing & control unit generates.

Address selects device, control indicates read/write/I-O, data transfers. Multiplexed address/data reduces pins.

Overview of 8051 Family

MCS-51 launched by Intel 1980. Members: 8051 (4KB ROM,128B RAM), 8052 (8KB/256B + T2), 8031 (0KB ROM-less), 8751 (EPROM), AT89C51 (Flash), AT89S52 etc. Derivatives from Philips, Atmel, NXP, Silicon Labs. Core: 8-bit CPU, 32 I/O, 2 timers, 5 interrupts, 1 UART, 64K program/data, 40-pin. Extensions: 80C51 CMOS, low-power, more timers, ADC, CAN. Modern: 8051 IP core still widely used in SoCs.

Important Processors in Embedded Systems

• 8051 family (Intel/MCS-51): 8-bit control, cheap, widespread for appliances.
• AVR (ATmega): RISC, Arduino, low-power.
• PIC (Microchip): Wide range, industrial.
• ARM (Cortex-M0/M3/M4): 32-bit, high-performance, phones, RTOS.
• MSP430 (TI): Ultra-low-power for battery/IoT.
• RISC-V: Open-source, emerging.
• DSPs (TI C2000): Signal processing.
• SoCs (ESP32): WiFi/BT + MCU.

Selection depends on performance, power, cost, peripherals, tool chain.

Operations Performed by Microprocessor

1. Data Transfer: Register↔memory/I/O (MOV, MOVX, PUSH/POP).
2. Arithmetic: ADD, SUB, MUL, DIV, INC/DEC on binary/BCD.
3. Logic: AND, OR, XOR, NOT, rotate, compare.
4. Control/Branch: JMP, CALL, RET, conditional jumps.
5. I/O Control: IN, OUT, port manipulation, serial.
6. Timing & Control: Fetch-decode-execute sequencing, interrupt handling, bus control.
7. Stack & Subroutine management.

Salient Features of 8051

8-bit CPU, 4KB ROM, 128B RAM, 32 I/O lines (4 ports), 2×16-bit timers, 5 interrupts (2 external), full-duplex UART, 64K program+64K data, boolean processor with bit operations, 111 instructions (49 single-byte), 1µs cycle @12MHz, single supply +5V, 40-pin DIP, Harvard, 4 register banks, bit-addressable RAM/SFRs, power save (Idle/Power-down), commercial/industrial temp.

Buses in 8-bit Microprocessor – see Q69

Address (unidirectional,16-bit, selects memory/I-O), Data (bidirectional,8-bit, carries data), Control (RD,WR,ALE,\overline{PSEN}, interrupts, hold). Multiplexed AD7-0 with latch as in 8085/8051.

Short Notes: Overview 8051 Family – see Q17

MCS-51 lineup, core features 4KB/128B/32 I/O/2 timers/5 interrupts/UART, derivatives AT89C51/52, modern IP, applications.

Compare Microprocessor vs Microcontroller – see Q42

MP: CPU only, needs external memory/I-O, high performance/cost, general computing. MC: SoC with memory/I-O on-chip, low cost/power, dedicated control. Table with 4+ points plus examples (8085/8086 vs 8051/ARM Cortex-M).