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Module 2: x86 Architecture, CPU Control, I/O, Memory System Design

20147m

Explain stack-based architecture of a CPU with the help of a diagram.

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Stack-Based Architecture of CPU

Definition: A stack is a LIFO (Last-In-First-Out) storage structure where access is only at the TOP. In a stack-based CPU (0-address machine), operands are implicitly taken from the top of stack and result is pushed back onto stack. Instructions do not contain address fields for operands e.g. ADD, PUSH A, POP B.

1. Organization

Stack can be:

  • Register Stack: Small set of registers organized as stack (fast, limited depth)
  • Memory Stack: Reserved memory region with Stack Pointer (SP) register pointing to TOS. Grows toward lower addresses (in x86) or upward.

Main Registers involved:

  • SP (Stack Pointer): Holds address of Top-Of-Stack (TOS)
  • TOS: Top element itself, sometimes a dedicated register for fast access
  • PC, MAR, MDR, IR as usual

2. Diagram

                    CPU
    +-------------------------------+
    |  ALU                          |
    |   ^                           |
    |   |                           |
    |  TOS  <-- Top of Stack        |      Memory (Stack Region)
    |   |                           |      +-------------------+
    |  SP ---> [ STACK ] -----------+----> |        ...        |
    |         (LIFO)                |      |  TOS -> [  Data  ] | <- SP
    |                               |      |         [  Data  ] |
    |  MAR / MDR -------------------+----> |         [  Data  ] |
    +-------------------------------+      |        ...        |
                                         +-------------------+
                PUSH: SP <- SP-1 ; M[SP] <- data
                POP : data <- M[SP] ; SP <- SP+1   (for descending stack)

For Register Stack (e.g. 64-word stack):

   SP -> |  A  |  <- TOS
         |  B  |
         |  C  |
         |  D  |
         |_____|
 DR --TOS-- ALU

3. Operations

  • PUSH X: SP ← SP +/- 1 ; M[SP] ← X (or TOS ← X ; SP ← SP+1)
  • POP X: X ← M[SP] ; SP ← SP -/+ 1
  • ADD: TOS ← TOS + NEXT ; pop one item. Example: ADD does A← M[SP]; B← M[SP-1]; M[SP-1]← A+B; SP← SP-1

Expression Evaluation Example: X = (A+B)*(C-D)

PUSH A
PUSH B
ADD      ; TOS = A+B
PUSH C
PUSH D
SUB      ; TOS = C-D
MUL      ; TOS = (A+B)*(C-D)
POP X

4. Characteristics

  • 0-address instruction - opcode only, operand location implicit.
  • No need to specify addresses, instruction length small, code compact.
  • Hardware simplifies compiler for expression evaluation using postfix (Reverse Polish Notation).
  • Used in HP calculators, Java Virtual Machine (JVM), Burroughs B5000.

5. Advantages & Disadvantages

Advantages: Simple instruction format, efficient for subroutine calls (saving return address, registers), interrupt handling, easy compilation of arithmetic expressions.

Disadvantages: Stack is bottleneck (sequential access only), random access to stack elements difficult, stack overflow/underflow must be handled, slower than register-to-register if many stack memory accesses (needs cache/TOS optimization).

In modern CPUs, stack is used for CALL/RET, parameter passing, local variables, while general-purpose register architecture is preferred for speed.

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