MICROPROCESSORS
100504Module 2: The 8051 Architecture
Q1a. The Program Counter (PC) in 8051 is how many bits? (i) 8-bit (ii) 16-bit (iii) 12-bit (iv) 32-bit20242m
Module 2: The 8051 Architecture
View this question on its own page →The Program Counter (PC) in 8051 is how many bits?
(i) 8-bit
(ii) 16-bit
(iii) 12-bit
(iv) 32-bitQ1a. Which among the below mentioned functions does not belong to the category of alternate functions usually performed by Port 3 (Pins 10-17)? (i) External interrupts (ii) Internal interrupts (iii) Serial ports (iv) Read/Write control signals20202m
Module 2: The 8051 Architecture
View this question on its own page →Which among the below mentioned functions does not belong to the category of alternate functions usually performed by Port 3 (Pins 10-17)?
(i) External interrupts
(ii) Internal interrupts
(iii) Serial ports
(iv) Read/Write control signalsQ1a. Which output control signal is activated after every six oscillator periods while fetching the external program memory and almost remains high during internal program execution? (i) ALE (ii) \overline{PSEN} (iii) \overline{EA} (iv) All of the above20212m
Module 2: The 8051 Architecture
View this question on its own page →Which output control signal is activated after every six oscillator periods while fetching the external program memory and almost remains high during internal program execution?
(i) ALE
(ii)
(iii)
(iv) All of the aboveQ1b. Why are the resonators not preferred for an oscillator circuit of 8051? (i) Because they do not avail for 12 MHz higher order frequencies (ii) Because they are unstable as compared to quartz crystals (iii) Because cost reduction due to its utility is almost negligible in comparison to total cost of microcontroller board (iv) All of the above20202m
Module 2: The 8051 Architecture
View this question on its own page →Why are the resonators not preferred for an oscillator circuit of 8051?
(i) Because they do not avail for 12 MHz higher order frequencies
(ii) Because they are unstable as compared to quartz crystals
(iii) Because cost reduction due to its utility is almost negligible in comparison to total cost of microcontroller board
(iv) All of the aboveQ1b. Total bit addressable area in RAM of 8051 microcontroller is ____? (i) 8 bytes (ii) 4 bytes (iii) 16 bytes (iv) 32 bytes20222m
Module 2: The 8051 Architecture
View this question on its own page →Total bit addressable area in RAM of 8051 microcontroller is ____?
(i) 8 bytes
(ii) 4 bytes
(iii) 16 bytes
(iv) 32 bytesQ1b. In 8051, which register is used to enable or disable interrupts? (i) IE (ii) IP (iii) TCON (iv) PCON20242m
Module 2: The 8051 Architecture
View this question on its own page →In 8051, which register is used to enable or disable interrupts?
(i) IE
(ii) IP
(iii) TCON
(iv) PCONQ1b. Which company developed the 8051 microcontroller? (i) Intel (ii) AMD (iii) IBM (iv) Motorola20252m
Module 2: The 8051 Architecture
View this question on its own page →Which company developed the 8051 microcontroller?
(i) Intel
(ii) AMD
(iii) IBM
(iv) MotorolaQ1c. The Stack Pointer points to (i) Program memory (ii) Top of stack (iii) Data memory (iv) I/O port20252m
Module 2: The 8051 Architecture
View this question on its own page →The Stack Pointer points to
(i) Program memory
(ii) Top of stack
(iii) Data memory
(iv) I/O portQ1d. Which flag allows to carry out the signed as well as unsigned addition and subtraction operations? (i) CY (ii) OV (iii) AC (iv) FO20202m
Module 2: The 8051 Architecture
View this question on its own page →Which flag allows to carry out the signed as well as unsigned addition and subtraction operations?
(i) CY
(ii) OV
(iii) AC
(iv) FOQ1d. The default start value of Stack Pointer after reset in 8051 is: (i) 00H (ii) 10H (iii) FFH (iv) 07H20242m
Module 2: The 8051 Architecture
View this question on its own page →The default start value of Stack Pointer after reset in 8051 is:
(i) 00H
(ii) 10H
(iii) FFH
(iv) 07HQ1d. Which port has dual functionality in 8051? (i) Port 0 (ii) Port 2 (iii) Port 1 (iv) Port 320252m
Module 2: The 8051 Architecture
View this question on its own page →Which port has dual functionality in 8051?
(i) Port 0
(ii) Port 2
(iii) Port 1
(iv) Port 3Q1e. Which type of memory in 8051 is bit-addressable? (i) Entire RAM (ii) Register bank (iii) 16 bytes of internal RAM from 20H to 2FH (iv) Entire ROM20242m
Module 2: The 8051 Architecture
View this question on its own page →Which type of memory in 8051 is bit-addressable?
(i) Entire RAM
(ii) Register bank
(iii) 16 bytes of internal RAM from 20H to 2FH
(iv) Entire ROMQ1f. A timing diagram shows: (i) Logical output of program (ii) Voltage transitions with respect to time (iii) Machine code of instruction (iv) Bus architecture20242m
Module 2: The 8051 Architecture
View this question on its own page →A timing diagram shows:
(i) Logical output of program
(ii) Voltage transitions with respect to time
(iii) Machine code of instruction
(iv) Bus architectureQ1f. The 8051 has how many I/O ports? (i) 1 (ii) 4 (iii) 2 (iv) 520252m
Module 2: The 8051 Architecture
View this question on its own page →The 8051 has how many I/O ports?
(i) 1
(ii) 4
(iii) 2
(iv) 5Q1f. Which register usually stores the output generated by ALU in several arithmetic and logical operations? (i) Accumulator (ii) Special function register (iii) Timer register (iv) Stack pointer20202m
Module 2: The 8051 Architecture
View this question on its own page →Which register usually stores the output generated by ALU in several arithmetic and logical operations?
(i) Accumulator
(ii) Special function register
(iii) Timer register
(iv) Stack pointerQ1f. Which operation is performed by stack pointer during its incremental phase? (i) Push (ii) Pop (iii) Return (iv) All of the above20212m
Module 2: The 8051 Architecture
View this question on its own page →Which operation is performed by stack pointer during its incremental phase?
(i) Push
(ii) Pop
(iii) Return
(iv) All of the aboveQ1f. The number of pins in 8051 microcontroller is? (i) 64 (ii) 44 (iii) 40 (iv) 10020232m
Module 2: The 8051 Architecture
View this question on its own page →The number of pins in 8051 microcontroller is?
(i) 64
(ii) 44
(iii) 40
(iv) 100Q1g. Which version of MCS-51 requires the necessary connection of external clock source to XTAL2 in addition to the XTAL1 connectivity to ground level? (i) HMOS (ii) CHMOS (iii) CMOS (iv) All of the above20212m
Module 2: The 8051 Architecture
View this question on its own page →Which version of MCS-51 requires the necessary connection of external clock source to XTAL2 in addition to the XTAL1 connectivity to ground level?
(i) HMOS
(ii) CHMOS
(iii) CMOS
(iv) All of the aboveQ1g. What is the function of ALE signal in 8051? (i) Latches lower address byte (ii) Enables timers (iii) Selects internal memory (iv) Controls interrupt20242m
Module 2: The 8051 Architecture
View this question on its own page →What is the function of ALE signal in 8051?
(i) Latches lower address byte
(ii) Enables timers
(iii) Selects internal memory
(iv) Controls interruptQ1h. What kind of triggering configuration of external interrupt intimate(s) the signal to stay low until the generation of subsequent interrupt? (i) Edge-triggering (ii) Level triggering (iii) Both (i) and (ii) (iv) None of the above20212m
Module 2: The 8051 Architecture
View this question on its own page →What kind of triggering configuration of external interrupt intimate(s) the signal to stay low until the generation of subsequent interrupt?
(i) Edge-triggering
(ii) Level triggering
(iii) Both (i) and (ii)
(iv) None of the aboveQ1h. The Abbreviation for ALE is: (i) Address Latch Enable (ii) Address Light External (iii) Address Latch Eternal (iv) None of the above20222m
Module 2: The 8051 Architecture
View this question on its own page →The Abbreviation for ALE is:
(i) Address Latch Enable
(ii) Address Light External
(iii) Address Latch Eternal
(iv) None of the aboveQ1h. The number of hardware interrupts in 8051 is? (i) 2 (ii) 3 (iii) 4 (iv) 520232m
Module 2: The 8051 Architecture
View this question on its own page →The number of hardware interrupts in 8051 is?
(i) 2
(ii) 3
(iii) 4
(iv) 5Q2a. Demonstrate the Special Function Registers in 8051.20247m
Module 2: The 8051 Architecture
View this question on its own page →Demonstrate the Special Function Registers in 8051.
Q2b. Explain the functions and programming associated to Interrupt Controller block in 8051.20247m
Module 2: The 8051 Architecture
View this question on its own page →Explain the functions and programming associated to Interrupt Controller block in 8051.
Q3a. Discuss the Functions associated to all I/O Port pins in 8051.20247m
Module 2: The 8051 Architecture
View this question on its own page →Discuss the Functions associated to all I/O Port pins in 8051.
Q3a. Draw and explain the internal block diagram of the 8051 microcontroller.20257m
Module 2: The 8051 Architecture
View this question on its own page →Draw and explain the internal block diagram of the 8051 microcontroller.
Q3b. Describe the role of Program Counter and timing circuits in 8051.20257m
Module 2: The 8051 Architecture
View this question on its own page →Describe the role of Program Counter and timing circuits in 8051.
Q4a. How many 16-bit registers are available in 8051? Explain their functions.20217m
Module 2: The 8051 Architecture
View this question on its own page →How many 16-bit registers are available in 8051? Explain their functions.
Q4a. Explain the oscillator circuit and timing of the 8051 microcontrollers.20247m
Module 2: The 8051 Architecture
View this question on its own page →Explain the oscillator circuit and timing of the 8051 microcontrollers.
Q4a. Explain the Special Function Registers used in 8051.20257m
Module 2: The 8051 Architecture
View this question on its own page →Explain the Special Function Registers used in 8051.
Q4b. Explain the various external interrupt signals in 8051.20207m
Module 2: The 8051 Architecture
View this question on its own page →Explain the various external interrupt signals in 8051.
Q5. Illustrate the pin diagram of 8051 with the help of a suitable diagram and explain the utility of the pins available in 8051.202414m
Module 2: The 8051 Architecture
View this question on its own page →Illustrate the pin diagram of 8051 with the help of a suitable diagram and explain the utility of the pins available in 8051.
Q5a. Describe the memory organization in 8051 microcontroller.20237m
Module 2: The 8051 Architecture
View this question on its own page →Describe the memory organization in 8051 microcontroller.
Q5b. Explain the functions of SP and PC registers in 8051 microcontroller.20237m
Module 2: The 8051 Architecture
View this question on its own page →Explain the functions of SP and PC registers in 8051 microcontroller.
Q6a. Explain the oscillator circuit and timing of the 8051 microcontroller.20206m
Module 2: The 8051 Architecture
View this question on its own page →Explain the oscillator circuit and timing of the 8051 microcontroller.
Q6a. List the special function register associated with (i) Interrupts (ii) I/O ports (iii) Timers/Counters20217m
Module 2: The 8051 Architecture
View this question on its own page →List the special function register associated with
(i) Interrupts
(ii) I/O ports
(iii) Timers/CountersQ6a. What do you mean by general purpose registers? Explain the various flags and status register in 8051.20227m
Module 2: The 8051 Architecture
View this question on its own page →What do you mean by general purpose registers? Explain the various flags and status register in 8051.
Q6b. Explain the functions of the following pins: (i) ALE (ii) \overline{PSEN} (iii) \overline{EA} (iv) RST20208m
Module 2: The 8051 Architecture
View this question on its own page →Explain the functions of the following pins:
(i) ALE
(ii)
(iii)
(iv) RSTQ6b. Explain the concept of memory banks and further comment on the structure of the internal RAM of 8051.20217m
Module 2: The 8051 Architecture
View this question on its own page →Explain the concept of memory banks and further comment on the structure of the internal RAM of 8051.
Q6b. Explain the internal memory organization of the microcontroller 8051.20247m
Module 2: The 8051 Architecture
View this question on its own page →Explain the internal memory organization of the microcontroller 8051.
Q7a. Explain the alternate functions of port 0, port 2 and port 3.20206m
Module 2: The 8051 Architecture
View this question on its own page →Explain the alternate functions of port 0, port 2 and port 3.
Q7b. Explain how bit addressing is distinguished from byte addressing in the 8051 microcontroller.20208m
Module 2: The 8051 Architecture
View this question on its own page →Explain how bit addressing is distinguished from byte addressing in the 8051 microcontroller.
Q7b. What is the difference between over-flow and carry flag? Explain with an example.20217m
Module 2: The 8051 Architecture
View this question on its own page →What is the difference between over-flow and carry flag? Explain with an example.
Q7b. Explain the PSW flags and SFR's (Special function registers) of 8051 microcontroller and also write the type of SFR's.20227m
Module 2: The 8051 Architecture
View this question on its own page →Explain the PSW flags and SFR's (Special function registers) of 8051 microcontroller and also write the type of SFR's.
Q8a. Explain the special function registers associated with the I/O Ports. How to configure an I/O port as an input pin?20237m
Module 2: The 8051 Architecture
View this question on its own page →Explain the special function registers associated with the I/O Ports. How to configure an I/O port as an input pin?
Q8b. What are the special function registers associated with the interrupt module of 8051?20237m
Module 2: The 8051 Architecture
View this question on its own page →What are the special function registers associated with the interrupt module of 8051?
Q9a. Write short notes on: Interrupts20227m
Module 2: The 8051 Architecture
View this question on its own page →Write short notes on: Interrupts
Q9b. Write short notes on: I/O Ports20227m
Q9b. Write short notes on: Stack & Stack Pointer20247m
Module 2: The 8051 Architecture
View this question on its own page →Write short notes on: Stack & Stack Pointer
Q9b. Explain the address bus, data bus, and control bus in the 8051 architecture.20253.5m
Module 2: The 8051 Architecture
View this question on its own page →Explain the address bus, data bus, and control bus in the 8051 architecture.