Functional units

Fundamentals of Computer Systems (8hrs) · Computer Fundamentals & Emerging Technologies

1. The Five Basic Functional Units

Every computer, from a microwave controller to a supercomputer, is built from the same five functional units defined by Von Neumann:

Input unit — accepts data and instructions from the outside world.
Memory unit — stores data, instructions and results (primary + secondary).
Arithmetic Logic Unit (ALU) — performs arithmetic and logic operations.
Control Unit (CU) — fetches, decodes and issues control signals; the "manager".
Output unit — presents the result to the user.

CU + ALU + registers = CPU (Central Processing Unit), the brain of the computer.

2. Block Diagram

   ┌──────────────┐                    ┌────────────────────────────┐
   │  INPUT UNIT  │  data & instructions│            CPU             │
   │ keyboard,    │ ─────────────────► │  ┌──────────┐ ┌──────────┐ │
   │ mouse, mic,  │                    │  │   ALU    │ │   CU     │ │
   │ scanner,     │                    │  └──────────┘ └──────────┘ │
   │ camera,      │                    │  registers: PC, IR, MAR,   │
   │ sensors      │                    │  MBR, AC, flag register    │
   └──────────────┘                    └────────┬───────────────────┘
                                                │  data / address / control buses
                                       ┌────────┴────────┐
                                       │ PRIMARY MEMORY  │  RAM + ROM
                                       └────────┬────────┘
                                       ┌────────┴────────┐
                                       │ SECONDARY STORE │  HDD / SSD / pen-drive
                                       └────────┬────────┘
                                                │ result
                                       ┌────────┴────────┐
                                       │  OUTPUT UNIT    │ monitor, printer, speaker
                                       └─────────────────┘

3. Function of Each Unit

Unit	Main function	Examples / parts
Input	Convert human-readable data into binary form the machine can process	Keyboard, mouse, joystick, scanner, mic, barcode reader, OMR
Memory (primary)	Hold the currently running program and data; direct CPU access	RAM (volatile), ROM (non-volatile), cache, registers
Memory (secondary)	Permanent bulk storage; not directly executed from	Magnetic disk, SSD, optical disk, pen-drive, tape
ALU	Arithmetic ( $+, -, ×, ÷$ ) and logic (AND, OR, NOT, compare, shift)	Adder, subtractor, comparator circuits
CU	Fetch instruction, decode it, generate timing/control signals, direct data flow	Program counter, instruction register, clock, decoder
Output	Convert internal binary result into human-usable form	Monitor, printer, plotter, speaker, projector

4. ALU and CU in Detail

The ALU is combinational logic; it takes two operands (from registers or memory), an opcode selection and produces a result plus status flags — Carry (C), Zero (Z), Sign (S), Overflow (V), Parity (P).
The CU is sequential; it does instruction fetch → decode → execute, sets the read/write lines of memory and the select lines of the ALU, and keeps the whole machine synchronised to the clock.

5. System Buses

A bus is a group of parallel wires shared by all units.

Bus	Direction	Carries	Width decides
Address bus	CPU → memory/I-O (unidirectional)	Address of the cell to be accessed	Maximum addressable memory, $N = 2^{n}$ locations for $n$ lines
Data bus	Bidirectional	Actual data/instruction word	Word length, e.g. 8/16/32/64-bit machine
Control bus	Bidirectional	Read, Write, Interrupt, Clock, Reset, Bus request/grant	Timing and handshaking of the transfer

6. Instruction Cycle and the Stored Program Concept

Stored program concept: instructions and data live in the same memory and are fetched one by one — this is the core of the Von Neumann model.

 PC ──► MAR ──► [memory read] ──► MBR ──► IR   ─┐
  ▲                                             │ 1. FETCH
  │            2. DECODE  (CU decoder) ◄────────┘
  │                 │
  │                 ▼
  │            3. EXECUTE  (ALU / memory / I-O)
  │                 │
  └── PC + 1 ◄── 4. STORE result, update flags

Time of one cycle (four phases):

T_{cyc} = T_1 + T_2 + T_3 + T_4

where $T_1$ = fetch, $T_2$ = decode, $T_3$ = execute, $T_4$ = store-result time.

7. Exam Points

Draw the block diagram of a computer and explain all five functional units — 7-10 marks, almost certain.
Explain the function of ALU and CU separately — 3-5 marks.
Difference between primary and secondary memory — 3 marks.
Explain data bus, address bus and control bus with their widths — 5 marks.
What is the stored program concept? Trace one instruction cycle — 5 marks.
Addressable memory for $n$ address lines: $N = 2^{n}$ (e.g. 20 lines → 1 M locations) — 2-3 marks numerical.

Functional units