Memory Representation

Fundamentals of Computer Systems (8hrs) · Computer Fundamentals & Emerging Technologies

1. Unit Sizes — How Memory is Measured

Unit	Size	Meaning
Bit	1 binary digit	0 or 1 — the atom of memory
Nibble	4 bits	One hexadecimal digit (used in BCD)
Byte	8 bits	One character in ASCII; the addressable unit in most machines
Word	16 / 32 / 64 bits	Size the CPU handles in one operation — machine dependent
Kilo / Mega / Giga / Tera byte	$2^{10}$ / $2^{20}$ / $2^{30}$ / $2^{40}$ bytes	Powers of 2, not 1000

1 KB = 2^{10} = 1024 bytes, 1 MB = 2^{20}, 1 GB = 2^{30}, 1 TB = 2^{40} bytes

Hard-disk makers use $10^{6}$ while memory uses $2^{20}$ — the reason a "500 GB" drive shows ~465 GB.

2. MSB and LSB

In the 8-bit pattern 1100 1010:

Position	b7	b6	b5	b4	b3	b2	b1	b0
Bit	1	1	0	0	1	0	1	0
Weight	$2^{7}=128$	64	32	16	8	4	2	$2^{0}=1$

MSB (Most Significant Bit) = leftmost bit = sign bit in signed representation = b7 = 1 here.
LSB (Least Significant Bit) = rightmost bit = b0 = 0 here.
Value = $128+64+8+2 = 202$ .

3. Byte-Addressable vs Word-Addressable Memory

Byte-addressable (x86, ARM): every byte has its own address; a 32-bit word occupies 4 consecutive addresses.
Word-addressable (many DSPs, older mainframes): each address points to a full word; address 0 = first word.
If word length = 4 bytes, then word address = byte address / 4, and the number of words = capacity in bytes / 4.

4. Big-Endian vs Little-Endian

Storing the 32-bit value 0x12345678 at address 2000H:

Address	Big-Endian (MSB first)	Little-Endian (LSB first)
2000H	12 (MSB)	78 (LSB)
2001H	34	56
2002H	56	34
2003H	78 (LSB)	12 (MSB)

Big-endian — IBM mainframes, SPARC, and the standard network byte order (TCP/IP).
Little-endian — Intel x86, AMD64, most ARM in default mode.
Mixed ("middle-endian") orders existed on old PDP machines. Endianness must be fixed by protocol, else two machines read the same bytes differently.

5. How Different Data Types Are Stored

Unsigned integer — plain positional binary.
Signed integer (2's complement) — MSB carries negative weight: for 8 bits

Value = -b_7 × 2^{7} + b_6 × 2^{6} + ... + b_0 × 2^{0}

Character — one byte (ASCII) or 2-4 bytes (Unicode/UTF-8/UTF-16).
String — consecutive character bytes, ended by a null (C style) or with a separate length field.
Floating point (IEEE-754 single precision = 32 bits: 1 sign + 8 exponent + 23 mantissa)

V = (-1)^{S} × 1.M × 2^{(E - 127)}, E_{stored} = E_{true} + 127

Example: $0.15625 = 1.25 × 2^{-3}$ → $S = 0$ , $E = -3 + 127 = 124 = 0111 1100$ , $M = 01000...0$ →
0 01111100 01000000000000000000000 = 0x3E200000.
Double precision = 64 bits (1 + 11 + 52) with bias 1023; special patterns: $E = 0$ → denormal, $E = 255$ → ∞ / NaN.

6. Alignment and Padding

Memory is read word-by-word, so a 4-byte integer starting at an address that is not a multiple of 4 needs two memory reads. Compilers therefore align data and insert padding bytes:

struct { char c; int n; }   /* c at 0, 3 padding bytes, n at 4-7  → sizeof = 8, not 5 */

Alignment trades a little wasted space for much faster access — the reason sizeof(struct) is often larger than the sum of its members.

7. Exam Points

Define bit, nibble, byte, word; state the powers-of-two conversions — 3 marks.
Big-endian vs little-endian with a diagram of 0x12345678 in memory — 3-5 marks, very frequent.
Represent a given decimal fraction in IEEE-754 single precision (and back) — 5 marks numerical.
What are MSB and LSB? Find the value of a given binary pattern — 3 marks.
Why is memory alignment required? What is padding? — 3 marks.
Difference between byte-addressable and word-addressable memory — 3 marks.

Memory Representation