Data Representation (8hrs) · Computer Fundamentals & Emerging Technologies

Signed number representation (2's complement)

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Signed number representation (2's complement)

1. Definition

The 2's complement of an nn-bit binary number is its 1's complement plus 1:

2′scomplement=(2n−1)−X+1=2n−X2's complement = (2^{n} - 1) - X + 1 = 2^{n} - X

The MSB is still the sign bit (0 = positive, 1 = negative), but unlike the other schemes there is exactly one zero, and no special carry handling is needed. Every modern CPU — Intel, AMD, ARM, RISC-V — stores negative integers this way.

2. Two Ways to Find the 2's Complement

Method A — invert every bit, then add 1:

Decimal 8-bit magnitude 1's complement +1 → 2's complement
+45 0010 1101 1101 0010 1101 0011 = −45
+9 0000 1001 1111 0110 1111 0111 = −9
+1 0000 0001 1111 1110 1111 1111 = −1
−128 1000 0000 (the only negative pattern with no positive twin) 0111 1111 1000 0000 = −128

Method B — "copy up to the first 1 from the LSB, invert the rest": scan the bits from right to left; copy each bit until (and including) the first 1, then invert all the remaining higher-order bits. No addition is required.

For 0010 1101 (+45), reading from the LSB: 1, 0, 1, 1, 0, 1, 0, 0

Bit position b0 b1 b2 b3 b4 b5 b6 b7
Original 1 0 1 1 0 1 0 0
Action first 1 → copy invert invert invert invert invert invert invert
Result 1 1 0 0 1 0 1 1

Reading the result MSB-first: 1101 0011 = −45 ✓ (identical to Method A)

Negation is self-inverse: the 2's complement of −45 (1101 0011) is +45 again, because 2n−(2n−X)=X2^{n} - (2^{n} - X) = X.

3. Range and the Single Zero

For nn bits:

−2n−1to+2n−1−1-2^{n-1} to +2^{n-1} - 1
Bits Range Number of values
4 −8 to +7 16
8 −128 to +127 256
16 −32768 to +32767 65536
32 −2147483648 to +2147483647 ~4.3 × 10⁹

The asymmetric range exists because the pattern 1000…0 is used for the most negative value (−128 in 8 bits), while zero has only one representation (0000 0000). This gives 2's complement one extra negative value compared with 1's complement and sign-magnitude.

All 4-bit values:

Pattern Value Pattern Value
0000 0 1000 −8
0001 1 1001 −7
0010 2 1010 −6
0011 3 1011 −5
0100 4 1100 −4
0101 5 1101 −3
0110 6 1110 −2
0111 7 1111 −1

4. Addition — Plain Binary Addition

Add the patterns as ordinary binary and discard the carry beyond the MSB (there is no end-around carry).

Example 1: 9 + (−4)

   0000 1001     (+9)
 + 1111 1100     (−4)
 ───────────
 1 0000 0101  → discard the carry out → 0000 0101 = +5   ✓

Example 2: (−12) + 5

   1111 0100     (−12)
 + 0000 0101     (+5)
 ───────────
   1111 1001     no carry → negative → 2's comp = 0000 0111 = 7 → −7   ✓

Example 3: (−5) + (−2)

   1111 1011 + 1111 1110 = 1 1111 1001 → discard carry → 1111 1001
   2's comp of 1111 1001 = 0000 0111 = 7 → answer −7   ✓

5. Subtraction

Use the identity A − B = A + (2's complement of B) — the same adder hardware, no borrow logic.

Example: 12 − 5

   0000 1100     (+12)
 + 1111 1011     (2's comp of +5)
 ───────────
 1 0000 0111 → discard carry → +7   ✓

Example: 5 − 12

   0000 0101 + 1111 0100 = 1111 1001 → negative
   2's comp of 1111 1001 = 0000 0111 = 7 → answer −7   ✓

6. Overflow Detection

Overflow happens only when two numbers of the same sign produce a result of the opposite sign. Two equivalent hardware tests:

  1. Carry test — the carry into the MSB differs from the carry out of the MSB.
  2. Sign test — the sign bit of the result is wrong for the operands' signs.

Example (4-bit range −8…+7): 5+55 + 5 → 0101 + 0101 = 1010 → both operands positive but the result is negative (−6 in 2's complement) ⇒ overflow, because the true answer +10 lies outside the range. Adding a positive and a negative number can never overflow.

7. Sign Extension

When a smaller 2's complement number is moved into a wider register, the sign bit must be copied into all new high-order bits (sign extension), not zero-filled:

−5(4−bit1011)→8−bit11111011(still−5,not251)-5 (4-bit 1011) → 8-bit 1111 1011 (still −5, not 251)

8. Why 2's Complement is Used Everywhere

Criterion Sign-magnitude 1's complement 2's complement
Number of zeros 2 2 1
Subtraction hardware Separate subtractor Adder + end-around carry Adder only
Range (8 bits) −127…+127 −127…+127 −128…+127
Overflow detection Compare signs Compare signs Carry-in vs carry-out of MSB
Extra hardware step Magnitude comparison End-around carry None
Used in modern CPUs No No Yes

9. Exam Points

  • Define 2's complement and find the 2's complement of given numbers by both methods — 5 marks, almost certain.
  • Add/subtract signed numbers using 2's complement and show the discarded carry — 5-7 marks, very frequent.
  • State the range for n bits and explain why there is one extra negative value — 3-5 marks.
  • What is overflow? How is it detected using carries? Show with a 4-bit example — 5 marks.
  • Compare sign-magnitude, 1's complement and 2's complement (tabular) — 5 marks, frequent.
  • What is sign extension and why is it needed? — 3 marks.
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