COMPUTER ORGANIZATION & ARCHITECTURE

What is the first step in the instruction execution cycle?
(i) Decode
(ii) Fetch
(iii) Execute
(iv) Store

Which type of control unit is faster but more difficult to modify?
i) Hardwired Control Unit
ii) Microprogrammed Control Unit
iii) Cache Control Unit
iv) Memory Management Unit

Which of the following I/O transfer methods involves the CPU polling the device until data is read?
i) DMA
ii) Interrupt-driven I/O
iii) Program-controlled I/O
iv) Asynchronous I/O

(f) The transfer of large chunks of data with the involvement of the processor is done by
(i) DMA controller
(ii) arbitrator
(iii) user system programs
(iv) None of the above

A micro programmed control unit:
(i) Is faster than a hardwired control unit
(ii) Facilitates easy implementation of new instructions
(iii) Is useful when every small program is to be run
(iv) Usually refers to the control unit of the microprocessor

Which of the following is NOT a type of parallel processor architecture?
a) SIMD
b) MIMD
c) SISO
d) Multi-core

In memory-mapped I/O:
(i) The I/O devices and the memory share the same address space.
(ii) The I/O device have a separate address space
(iii) The memory and I/O device have an associated address space
(iv) A part of the memory is specifically set aside for the I/O operation

(g) The computer architecture aimed at reducing the time of execution of instructions is

(i) CISC
(ii) RISC
(iii) ISA
(iv) ANNA

Which table handle stores the addresses of the interrupt handling sub-routines?

(i) Interrupt-vector table
(ii) Vector table
(iii) Symbol link table
(iv) None of the above

__________________ Addressing mode directly specifies the operand within the instruction.
i. Direct addressing
ii. Indirect addressing
iii. Immediate addressing
iv. Indexed addressing

The addressing mode, where you directly specify the operand value is:
(i) Immediate
(ii) Direct
(iii) Definite
(iv) Relative

How many 128×8 bit RAMs are required to design 32 k x 32 bit RAM?

• (i) 512
• (ii) 128
• (iii) 1024
• (iv) 32

What is the difference between Programmed I/O and Interrupt-driven I/O?

Registers R1 and R2 of a computer contain the decimal values 1200 and 4600. What is the effective address of the memory operand in each of the following instructions?

• (i) Load 20(R1), R5
• (ii) Add –(R2), R5

Justify the statement “Stack computer consists of an operation code only with no address field”.

What is zero address instruction format?

Explain different types of interrupts.

What is the use of condition code register?

Explain MIPS and MFLOPS.

Which addressing mode uses the contents of a register to determine the effective address?
(i) Signed integers
(ii) Indirect addressing
(iii) Direct addressing
(iv) Register addressing

The intradata transfer techniques are implemented using

• (i) serial I/O
• (ii) parallel 1/0
• (iii) Both (i) and (ii)
• (iv) Neither (i) nor (ii)

The sequence of events that happen during a typical fetch operation is

• (i) PC → MAR → Memory → MDR → IR
• (ii) PC → Memory → MDR → IR
• (iii) PC → Memory → IR
• (iv) PC → MAR → Memory → IR

What do you mean by Arithmetic shift left operation?

What do you mean by interrupt-initiated I/O?

Define program counter.

Describe the phases in an instruction cycle.

What are the properties of an ideal instruction set computer?

What do you mean by direct memory access?

x86 architecture belongs to which processor family?
(i) RISC
(ii) CISC
(iii) EPIC
(iv) ARM

Define the term hardware polling.

What is the difference between hardwired control and microprogrammed control?

Write the sequence of control steps required for three-bus structure for the following instruction:

• Add R4, R5, R6

In case of vectored interrupt, interrupt vector means

• (i) the branch information from the source which interrupts the system
• (ii) an address that points to a location in memory where the beginning address of the I/O service routine is stored
• (iii) Both (i) and (ii)
• (iv) None of the above

Explain the use of subroutine with the help of suitable example.

Memory chips used in main memory are typically:
(i) Optical memory
(ii) Flash
(iii) Magnetic tapes
(iv) DRAM

Explain indirect address mode, and how the effective address is calculated in this case.

What is a micro-operation? Explain the four categories of the most common micro-operations.

Briefly explain subroutine call and return.

USB is an example of:
(i) Networking device
(ii) Storage device only
(iii) Standard I/O interface
(iv) Wireless protocol

A microprogrammed control unit

• (i) is faster than a hardwired control unit
• (ii) facilitates easy implementation of new instructions
• (iii) is useful when every small program is to be run
• (iv) usually refers to the control unit of the microprocessor

What is the difference between a subroutine and an interrupt service routine?

Define bus arbitration.

Why is read and write control lines in a DMA controller bidirectional? Under what condition and for what purpose are they used as inputs?

With neat block diagram, explain how DMA controller is initialized for DMA data transfer.

Explain in detail the different addressing modes.

Describe the instruction execution cycle in a CPU. Explain some key features of the x86 architecture

(b) Discuss the design and logic of a microprogram sequence.

Explain different addressing modes in a CPU with an example.

How do instruction set, compiler technology, CPU implementation and control, and cache and memory hierarchy affect the CPU performance? Justify the effects in terms of program length, clock rate and effective CPI.

Explain addressing modes with examples. Compare at least five different addressing techniques.